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DxHASH - Discretix HASH Cryptographic Engines Discretix Cryptographic Engines The DxHASH cryptographic engines fully support the combinations of the MD5 algorithm and Secure Hash Algorithm (SHA), including SHA-1, SHA-256 and SHA-512. The HASH engines generate a digest for data streams and objects. The HASH engine has two main interfaces for data and configuration. Data is provided through a valid 32-bit input signal and a valid bytes signal. The configuration interface allows the CPU to configure the desired mode, load and offload contexts and read the digest computed by the core. The DxHASH engines are highly configurable to address a wide range of applications. HASH Block Diagram
The DxHASH engine is available in various configurations supporting a wide range of throughput requirements and desired gate count. HMAC versions are available for all configurations.
Key Features
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Key Applications
- Digital Right Management schemes (OMA DRM, PlayReady)
- WLAN applications (IEEE 802.11)
- IPSec and SSL
- WiMax applications (IEEE 802.16)
- E-commerce (EMV 4.1)
- Storage – SAN/NAS applications (IEEE P1619)
- Transient storage devices (IEEE 1667)
Benefits
- Silicon proven – deployed in numerous devices and platforms
- Vast experience with multiple tier-1 customers
- Mature technology from the embedded security market leader
- Fast time to market, easily integrated
- Highly optimized implementation ensures minimal gate count and reduced power consumption
- Excellent technical support
Certifications
- FIPS ready
- Common Criteria EAL4+ ready
Deliverables
- Synthesizable Verilog RTL source code
- Synthesis script and constraints
- RTL Test Bench (test vectors and expected results)
- User Manual with hardware integration guidelines and application notes