Discretix Cryptographic Engines
Discretix cryptographic engines are widely deployed in leading
system-on-chip solutions. Discretix provides high-quality,
ready-to-use cryptographic engines, to support variety of
applications. Included in Discretix’s family of cryptographic
engines are symmetric ciphers, asymmetric ciphers, Hash and
random number generators.
DxHASH - General Description
The DxHASH cryptographic engines fully support the combinations of the MD5 algorithm
and Secure Hash Algorithm (SHA), including SHA-1, SHA-256 and SHA-512. The HASH
engines generate a digest for data streams and objects. The HASH engine has two
main interfaces for data and configuration. Data is provided through a valid 32-bit
input signal and a valid bytes signal. The configuration interface allows the CPU to configure the desired mode, load and offload contexts and read the digest computed
by the core. The DxHASH engines are highly configurable to address a wide range
of applications.
HASH Block Diagram
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| Key Applications |
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Digital Right Management schemes (OMA DRM, PlayReady) |
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WLAN applications (IEEE 802.11) |
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IPSec and SSL |
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WiMax applications (IEEE 802.16) |
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E-commerce (EMV 4.1) |
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Storage – SAN/NAS applications (IEEE P1619) |
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Transient storage devices (IEEE 1667) |
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| Benefits |
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Silicon proven – deployed in numerous devices and platforms |
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Vast experience with multiple tier-1 customers |
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Mature technology from the embedded security market leader |
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Fast time to market, easily integrated |
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Highly optimized implementation ensures minimal gate count and reduced power consumption |
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Excellent technical support |
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| Certifications |
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FIPS ready |
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Common Criteria EAL4+ ready |
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| Deliverables |
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Synthesizable Verilog RTL source code |
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Synthesis script and constraints |
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RTL Test Bench (test vectors and expected results) |
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User Manual with hardware integration guidelines and application notes |
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HASH Configuration Options
The DxHASH engine is available in various configurations supporting a wide range of throughput requirements and desired gate count. HMAC versions are available for
all configurations.
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Name¹
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Configuration² |
Maximum Throughput
(in Mbps) |
Maximum Clock Frequency |
Gate³ Count
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DxHASH-01 |
MD-5
SHA-1 |
1430
1144 |
190MHz |
17K |
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DxHASH-02 |
MD-5
SHA-1 |
1648
1379 |
132MHz |
24K |
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DxHASH-03 |
MD-5
SHA-1
SHA-256 |
1430
1144
1341 |
190MHz |
24K |
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DxHASH-04 |
MD-5
SHA-1
SHA-256 |
1648
1379
1648 |
132MHz |
41K |
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DxHASH-05 |
SHA-1
SHA-256 |
1144
1341 |
190MHz |
19K |
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DxHASH-06 |
SHA-1
SHA-256 |
1379
1648 |
132MHz |
28K |
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DxHASH-07 |
SHA-1
SHA-256
SHA-512 |
1083
1270
2094 |
180MHz |
40K |
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DxHASH-08 |
SHA-1
SHA-256
SHA-512 |
1316
1573
2633 |
126MHz |
72K |
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DxHASH-09 |
MD-5
SHA-1
SHA-256
SHA-512 |
1354
1083
1270
2094 |
180MHz |
47K |
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DxHASH-10 |
MD-5
SHA-1
SHA-256
SHA-512 |
1573
1316
1573
2633 |
126MHz |
80K |
- Optional support for HMAC in all configurations
- In configurations where SHA-256 mode is supported, SHA-224 is supported as well
In configurations where SHA-512 mode is supported, SHA-384 is supported as well
- Technology and synthesis dependent; based on the use of design compiler and slow speed 0.09 ?m TSMC technology; measured at 100MHz
Key Features
- Throughput up to 2633 Mbps
- Supports MD5, SHA-1, SHA-224, SHA-256, SHA-384 and SHA-512 modes
- Support for multiple contexts
- Automatic input padding
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- FIPS PUB 180-1 and FIPS PUB 180-2 compliant
- RFC 1321 compliant
- Optional support for HMAC in all configurations
- Optional support for AMBA AHB data interface
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